The present invention relates to an image sensor; and, more particularly, to an image sensor and a method for driving the same, in which the chip size is decreased and an erroneous occurrence in a CDS operation can be prevented.
Generally, an image sensor is an apparatus to capture images using light sensing semiconductor materials. The image sensor includes a pixel array which contains a plurality of image sensing elements, e.g., photodiode and receives light from an object to generate an electric image signal.
Such an image sensor is disclosed in a copending commonly owned application, U.S. Ser. No. 09/305,756, entitled xe2x80x9cCMOS IMAGE SENSOR HAVING COMMON OUTPUTTING TRANSISTORS AND METHOD FOR DRIVING THE SAMExe2x80x9d filed on May. 10, 1999.
The control and system interface unit contained in the image sensor controls the image sensor by controlling an integration time, scan addresses, operation modes, a frame rate, a bank and a clock division, and serves as an interface with an external system.
FIG. 2 is a circuit diagram of a conventional pixel array and FIG. 3 is a timing chart illustrating control signals of unit pixel contained in a pixel array shown in FIG. 2.
Referring to FIGS. 2 and 3, a pixel array including MxN unit pixels, arranged in a matrix, senses images from an object. The image sensor generally employs a correlated double sampling (hereinafter, referred to as a CDS), to thereby obtain high picture quality under the control of the control and system interface. In order to implement the CDS, each of the unit pixels includes, e.g., a photodiode and four transistors, respectively. Here, the pixel array is described taking one unit pixel as an example. The four transistors in the unit pixel 101 include a transfer transistor M21, a reset transistor M11, a drive transistor M31 and a select transistor M41. According to the CDS, the unit pixel 100 outputs a reset voltage level as a unit pixel output signal from a voltage source by turning on the select transistor M41 while the reset transistor M11 is kept on a turned-on state under the control of the control and system interface unit. Also, the unit pixel 100 provides a data voltage level as another unit pixel output signal from the photodiode by turning on and off the transfer transistor M21 in a turned-off state of the reset transistor M11 and reading out the photoelectric charges generated in the photodiode 101 under the control of the control and system interface unit. As a result, an unexpected voltage in the unit pixel can be effectively removed and a net image data value can be obtained by using the reset voltage level and the data voltage level as unit pixel output signals.
Referring to FIG. 3, there is shown a timing chart showing the control scheme for the CDS.
The turned-on transfer transistor is turned off and kept on a turned-off state during a predetermined period in response to the transfer control signal Tx1, while the reset transistor and the select transistor are kept on the turned-on state and the turned-off state, respectively.
As shown, the select transistor M41 is turned on in response to a select control signal Sx1 while the reset transistor M11 is kept on the turned-on state and the transfer transistor M21 is kept on the turned-off state, so that a reset voltage level is outputted through the drive transistor M31 and the select transistor M41 as a unit pixel output signal.
The reset voltage level and the data voltage level sampled in the sections xe2x80x9cExe2x80x9d and xe2x80x9cHxe2x80x9d are outputted to the analog-to-digital converter and converted into the digital signals. At this time, a difference between the digital signals corresponds to an image data of the unit pixel.
In such a CDS using four transistors, however, the size of the pixel array is increased and finally, the total size of the image sensor is remarkably increased.
Furthermore, in order for the correct CDS, a pinning voltage of the photodiode should be a reset voltage level. However, the pinning voltage may be different, depending on the characteristic of the formation of the photodiode when the depletion region is made in the photodiode by turning on the transfer transistor and the reset transistor and turning off the select transistor. Additionally, although the voltage levels of the nodes N1 and N2 in FIG. 2 should be maintained at a predetermined level, the pinning voltage of the nodes may be changed due to external erroneous factors. Therefore, there is a problem that the error may occur in the CDS operation.
It is, therefore, an object of the present invention to provide an image sensor and a method for driving the same, in which the chip size is decreased and an erroneous occurrence in a CDS operation can be prevented.
In accordance with an aspect of the present invention, there is provided a CMOS image sensor including a pixel array with M(row line)xc3x97N(column line) unit pixels, M and N being a positive integer, respectively, each unit pixel comprising: a light sensing means, coupled to a sensing node, for receiving light from an object to generate photoelectric charges; a resetting means, coupled to the sensing node, for making a fully depleted region within the light sensing means and providing a reset voltage level to the sensing node in response to a first control signal, wherein the reset voltage level corresponds to a level of the first control signal and is supplied to a unit pixel of a next row line as a power source, arranged on the same column line; an amplifying means for amplifying the voltage level of the sensing node to generate an amplified signal, wherein a power source of the amplifying means is derived from a unit pixel of a previous row line, arranged on the same column line; and a switching means, coupled between the amplifying means and an output terminal, for performing a switching operation to transfer the amplified signal to the output terminal in response to a second control signal.
In accordance with another aspect of the present invention, there is provided a method for driving the CMOS image sensor including a pixel array with M(row line)xc3x97N(column line) unit pixels, M and N being a positive integer, respectively, wherein each unit pixel includes a light sensing means, coupled to a sensing node, for receiving light from an object to generate photoelectric charges, a resetting means, coupled to the sensing node, for making a fully depleted region within the light sensing means and providing a reset voltage level to the sensing node in response to a first control signal, wherein the reset voltage level corresponds to a level of the first control signal and is supplied to a unit pixel of a next row line as a power source, arranged on the same column line, an amplifying means for amplifying the voltage level of the sensing node to generate an amplified signal, wherein a power source of the amplifying means is derived from a unit pixel of a previous row line, arranged on the same column line, and a switching means, coupled between the amplifying means and an output terminal, for performing a switching operation to transfer the amplified signal to the output terminal in response to a second control signal, the method comprising the steps of: a) turning on the resetting means, while the switching means is kept on a turned-off state to make a fully depleted region within the light sensing means; b) turning off the resetting means and keeping the turned-off state during a predetermined period, so that the light sensing means generates photoelectric charges; c) turning on the switching means to thereby output a data voltage level corresponding to the photoelectric charges to the output terminal through the amplifying and switching means; d) after a predetermined period, sampling the data voltage level; e) after a predetermined period, turning on and off the resetting means to thereby make a fully depleted region within the light sensing means and output the reset voltage level to the output terminal through the amplifying and switching means; and f) after a predetermined period, sampling a reset voltage level.